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1. general description the PCA9673 provides general purpose remote i/o expansion for most microcontroller families via the two-line bidirectional bus (i 2 c-bus) and is a part of the fast-mode plus family. the PCA9673 is a drop in upgrade for the pcf8575 providing higher fast-mode plus (fm+) i 2 c-bus speeds (1 mhz versus 400 khz) so that the output can support pwm dimming of leds, higher i 2 c-bus drive (30 ma versus 3 ma) so that many more devices can be on the bus without the need for bus buffers, higher total package sink capacity (400 ma versus 100 ma) that supports having all 25 ma leds on at the same time and more device addresses (16 versus 8) are available to allow many more devices on the bus without address con?icts. the difference between the PCA9673 and the pcf8575 is that the a2 address pin is replaced by a reset input on the PCA9673. the device consists of a 16-bit quasi-bidirectional port and an i 2 c-bus interface. the PCA9673 has a low current consumption and includes latched outputs with 25 ma high current drive capability for directly driving leds. it also possesses an interrupt line ( int) which can be connected to the interrupt logic of the microcontroller. by sending an interrupt signal on this line, the remote i/o can inform the microcontroller if there is incoming data on its ports without having to communicate via the i 2 c-bus. the internal power-on reset (por), hardware reset pin ( reset) or software reset sequence initializes the i/os as inputs. 2. features n 1 mhz i 2 c-bus interface n compliant with the i 2 c-bus fast and standard modes n sda with 30 ma sink capability for 4000 pf buses n 2.3 v to 5.5 v operation with 5.5 v tolerant i/os n 16-bit remote i/o pins that default to inputs at power-up n latched outputs with 25 ma sink capability for directly driving leds n total package sink capability of 400 ma n active low open-drain interrupt output n 16 programmable slave addresses using 2 address pins n readable device id (manufacturer, device type, and revision) PCA9673 remote 16-bit i/o expander for fm+ i 2 c-bus with interrupt and reset rev. 01 1 february 2007 product data sheet
PCA9673_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 1 february 2007 2 of 33 nxp semiconductors PCA9673 remote 16-bit i/o expander for fm+ i 2 c-bus with interrupt and reset n low standby current n - 40 c to +85 c operation n esd protection exceeds 2000 v hbm per jesd22-a114, 200 v mm per jesd22-a115, and 1000 v cdm per jesd22-c101 n latch-up testing is done to jedec standard jesd78 which exceeds 100 ma n packages offered: so24, ssop24, qsop24, tssop24, hvqfn24, dhvqfn24 3. applications n led signs and displays n servers n industrial control n medical equipment n plcs n cellular telephones n gaming machines n instrumentation and test measurement 4. ordering information [1] also known as qsop24. table 1. ordering information type number topside mark package name description version PCA9673d PCA9673d so24 plastic small outline package; 24 leads; body width 7.5 mm sot137-1 PCA9673db PCA9673db ssop24 plastic shrink small outline package; 24 leads; body width 5.3 mm sot340-1 PCA9673dk PCA9673 ssop24 [1] plastic shrink small outline package; 24 leads; body width 3.9 mm; lead pitch 0.635 mm sot556-1 PCA9673pw PCA9673pw tssop24 plastic thin shrink small outline package; 24 leads; body width 4.4 mm sot355-1 PCA9673bq 9673 dhvqfn24 plastic dual in-line compatible thermal enhanced very thin quad ?at package; no leads; 24 terminals; body 3.5 5.5 0.85 mm sot815-1 PCA9673bs 9673 hvqfn24 plastic thermal enhanced very thin quad ?at package; no leads; 24 terminals; body 4 4 0.85 mm sot616-1
PCA9673_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 1 february 2007 3 of 33 nxp semiconductors PCA9673 remote 16-bit i/o expander for fm+ i 2 c-bus with interrupt and reset 5. block diagram fig 1. block diagram of PCA9673 fig 2. simpli?ed schematic diagram of p00 to p17 002aac300 int i 2 c-bus control interrupt logic PCA9673 lp filter ad0 ad1 input filter shift register sda scl 16 bits write pulse read pulse power-on reset v dd v ss i/o port p00 to p07 p10 to p17 reset 002aab631 write pulse read pulse d ci s ff q power-on reset data from shift register i trt(pu) 100 m a i oh i ol v dd p00 to p07 p10 to p17 v ss d ci s ff q data to shift register to interrupt logic
PCA9673_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 1 february 2007 4 of 33 nxp semiconductors PCA9673 remote 16-bit i/o expander for fm+ i 2 c-bus with interrupt and reset 6. pinning information 6.1 pinning fig 3. pin con?guration for so24 fig 4. pin con?guration for tssop24 fig 5. pin con?guration for ssop24 (qsop24) fig 6. pin con?guration for ssop24 PCA9673d int v dd ad1 sda reset scl p00 ad0 p01 p17 p02 p16 p03 p15 p04 p14 p05 p13 p06 p12 p07 p11 v ss p10 002aac301 1 2 3 4 5 6 7 8 9 10 11 12 14 13 16 15 18 17 20 19 22 21 24 23 v dd sda scl ad0 p17 p16 p15 p14 p13 p12 p11 p10 int ad1 p00 p01 p02 p03 p04 p05 p06 p07 v ss PCA9673pw 002aac302 1 2 3 4 5 6 7 8 9 10 11 12 14 13 16 15 18 17 20 19 22 21 24 23 reset int v dd ad1 sda scl p00 ad0 p01 p17 p02 p16 p03 p15 p04 p14 p05 p13 p06 p12 p07 p11 v ss p10 PCA9673dk 002aac303 1 2 3 4 5 6 7 8 9 10 11 12 14 13 16 15 18 17 20 19 22 21 24 23 reset PCA9673db int v dd ad1 sda scl p00 ad0 p01 p17 p02 p16 p03 p15 p04 p14 p05 p13 p06 p12 p07 p11 v ss p10 002aac304 1 2 3 4 5 6 7 8 9 10 11 12 14 13 16 15 18 17 20 19 22 21 24 23 reset
PCA9673_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 1 february 2007 5 of 33 nxp semiconductors PCA9673 remote 16-bit i/o expander for fm+ i 2 c-bus with interrupt and reset 6.2 pin description fig 7. pin con?guration for hvqfn24 fig 8. pin con?guration for dhvqfn24 v dd sda scl 002aac305 PCA9673bs transparent top view p13 p04 p05 p14 p03 p15 p02 p16 p01 p17 p00 ad0 p06 p07 p10 p11 p12 ad1 int terminal 1 index area 6 13 5 14 4 15 3 16 2 17 1 18 7 8 9 10 11 12 24 23 22 21 20 19 v ss reset int v dd ad1 sda reset scl p00 ad0 p01 p17 p02 p16 p03 p15 p04 p14 p05 p13 p06 p12 p07 p11 v ss p10 002aac306 PCA9673bq transparent top view 11 14 10 15 9 16 8 17 7 18 6 19 5 20 4 21 3 22 2 23 12 13 1 24 terminal 1 index area table 2. pin description symbol pin description so24, ssop24, tssop24, dhvqfn24 hvqfn24 int 1 22 interrupt output (active low) ad1 2 23 address input 1 reset 3 24 reset input (active low) p00 4 1 quasi-bidirectional i/o 00 p01 5 2 quasi-bidirectional i/o 01 p02 6 3 quasi-bidirectional i/o 02 p03 7 4 quasi-bidirectional i/o 03 p04 8 5 quasi-bidirectional i/o 04 p05 9 6 quasi-bidirectional i/o 05 p06 10 7 quasi-bidirectional i/o 06 p07 11 8 quasi-bidirectional i/o 07 v ss 12 [1] 9 [1] supply ground p10 13 10 quasi-bidirectional i/o 10 p11 14 11 quasi-bidirectional i/o 11 p12 15 12 quasi-bidirectional i/o 12 p13 16 13 quasi-bidirectional i/o 13 p14 17 14 quasi-bidirectional i/o 14 p15 18 15 quasi-bidirectional i/o 15 p16 19 16 quasi-bidirectional i/o 16 p17 20 17 quasi-bidirectional i/o 17 ad0 21 18 address input 0
PCA9673_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 1 february 2007 6 of 33 nxp semiconductors PCA9673 remote 16-bit i/o expander for fm+ i 2 c-bus with interrupt and reset [1] hvqfn and dhvqfn package die supply ground is connected to both the v ss pin and the exposed center pad. the v ss pin must be connected to supply ground for proper device operation. for enhanced thermal, electrical, and board-level performance, the exposed pad needs to be soldered to the board using a corresponding thermal pad on the board, and for proper heat conduction through the board thermal vias need to be incorporated in the pcb in the thermal pad region. 7. functional description refer to figure 1 bloc k diag r am of PCA9673 . 7.1 device address following a start condition, the bus master must send the address of the slave it is accessing and the operation it wants to perform (read or write). the address of the PCA9673 is shown in figure 9 . slave address pins ad1 and ad0 choose 1 of 16 slave addresses. to conserve power, no internal pull-up resistors are incorporated on ad1 and ad0. address values depending on ad1 and ad0 can be found in t ab le 3 PCA9673 address map . remark: the general call address (0000 0000b) and the device id address (1111 100xb) are reserved and cannot be used as device address. failure to follow this requirement will cause the PCA9673 not to acknowledge. remark: reserved i 2 c-bus addresses must be used with caution since they can interfere with: ? reserved for future use i 2 c-bus addresses (0000 011, 1111 101, 1111 110, 1111 111) ? slave devices that use the 10-bit addressing scheme (1111 0xx) ? high speed mode (hs-mode) master code (0000 1xx) the last bit of the ?rst byte de?nes the operation to be performed. when set to logic 1 a read is selected, while a logic 0 selects a write operation. when ad1 and ad0 are held to v dd or v ss , the same address as the pcf8575 is applied. scl 22 19 serial clock line input sda 23 20 serial data line input/output v dd 24 21 supply voltage table 2. pin description continued symbol pin description so24, ssop24, tssop24, dhvqfn24 hvqfn24 fig 9. PCA9673 address r/w 002aab636 a6 a5 a4 a3 a2 a1 a0 programmable slave address
PCA9673_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 1 february 2007 7 of 33 nxp semiconductors PCA9673 remote 16-bit i/o expander for fm+ i 2 c-bus with interrupt and reset 7.1.1 address maps 7.2 software reset call, and device id addresses two other different addresses can be sent to the PCA9673. ? general call address: allows to reset the PCA9673 through the i 2 c-bus upon reception of the right i 2 c-bus sequence. see section 7.2.1 softw are reset for more information. ? device id address: allows to read id information from the device (manufacturer, part identi?cation, revision). see section 7.2.2 de vice id (PCA9673 id ? eld) for more information. table 3. PCA9673 address map ad1 ad0 a6 a5 a4 a3 a2 a1 a0 address (hex) scl v ss 001010028h scl v dd 00101012ah sda v ss 00101102ch sda v dd 00101112eh sclscl001110038h sclsda00111013ah sdascl00111103ch sdasda00111113eh v ss v ss 010010048h v ss v dd 01001014ah v dd v ss 01001104ch v dd v dd 01001114eh v ss scl010110058h v ss sda01011015ah v dd scl01011105ch v dd sda01011115eh fig 10. general call address fig 11. device id address 0 002aac155 0 0 0 0 0 0 0 r/w r/w 002aab638 1 1 1 1 1 0 0
PCA9673_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 1 february 2007 8 of 33 nxp semiconductors PCA9673 remote 16-bit i/o expander for fm+ i 2 c-bus with interrupt and reset 7.2.1 software reset the software reset call allows all the devices in the i 2 c-bus to be reset to the power-up state value through a speci?c formatted i 2 c-bus command. to be performed correctly, it implies that the i 2 c-bus is functional and that there is no device hanging the bus. the software reset sequence is de?ned as following: 1. a start command is sent by the i 2 c-bus master. 2. the reserved general call i 2 c-bus address 0000 000 with the r/ w bit set to 0 (write) is sent by the i 2 c-bus master. 3. the PCA9673 device(s) acknowledge(s) after seeing the general call address 0000 0000 (00h) only. if the r/ w bit is set to 1 (read), no acknowledge is returned to the i 2 c-bus master. 4. once the general call address has been sent and acknowledged, the master sends 1 byte. the value of the byte must be equal to 06h. a. the PCA9673 acknowledges this value only. if the byte is not equal to 06h, the PCA9673 does not acknowledge it. if more than 1 byte of data is sent, the PCA9673 does not acknowledge any more. 5. once the right byte has been sent and correctly acknowledged, the master sends a stop command to end the software reset sequence: the PCA9673 then resets to the default value (power-up value) and is ready to be addressed again within the speci?ed bus free time. if the master sends a repeated start instead, no reset is performed. the i 2 c-bus master must interpret a non-acknowledge from the PCA9673 (at any time) as a software reset abort. the PCA9673 does not initiate a reset of its registers. the unique sequence that initiates a software reset is described in figure 12 . 7.2.2 device id (PCA9673 id ?eld) the device id ?eld is a 3-byte read-only (24 bits) word giving the following information: ? 8 bits with the manufacturer name, unique per manufacturer (for example, nxp semiconductors). ? 13 bits with the part identi?cation, assigned by manufacturer, the 7 msbs with the category id and the 6 lsbs with the feature id (for example, PCA9673 16-bit quasi-output i/o expander). fig 12. software reset sequence 002aac307 0 0 0 0 0 0 0 a s 0 swrst call i 2 c-bus address start condition r/w acknowledge from slave(s) 0 0 0 0 1 1 0 0 swrst data = 06h a acknowledge from slave(s) p PCA9673 is(are) reset. registers are set to default power-up values.
PCA9673_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 1 february 2007 9 of 33 nxp semiconductors PCA9673 remote 16-bit i/o expander for fm+ i 2 c-bus with interrupt and reset ? 3 bits with the die revision, assigned by manufacturer (for example, rev x). the device id is read-only, hardwired in the device and can be accessed as follows: 1. start command 2. the master sends the reserved device id i 2 c-bus address 1111 100 with the r/ w bit set to 0 (write). 3. the master sends the i 2 c-bus slave address of the slave device it needs to identify. the lsb is a dont care value. only one device must acknowledge this byte (the one that has the i 2 c-bus slave address). 4. the master sends a re-start command. remark: a stop command followed by a start command will reset the slave state machine and the device id read cannot be performed. remark: a stop command or a re-start command followed by an access to another slave device will reset the slave state machine and the device id read cannot be performed. 5. the master sends the reserved device id i 2 c-bus address 1111 100 with the r/ w bit set to 1 (read). 6. the device id read can be done, starting with the 8 manufacturer bits (?rst byte + 4 msb of the second byte), followed by the 13 part identi?cation bits and then the 3 die revision bits (3 lsb of the third byte). 7. the master ends the reading sequence by nacking the last byte, thus resetting the slave device state machine and allowing the master to send the stop command. remark: the reading of the device id can be stopped anytime by sending a nack command. remark: if the master continues to ack the bytes after the third byte, the PCA9673 rolls back to the ?rst byte and keeps sending the device id sequence until a nack has been detected. for the PCA9673, the device id is as shown in figure 13 . fig 13. PCA9673 id 0 002aac333 0 0 revision 0 0 1 0 0 0 1 0 0 part identification 0 0 0 0 0 0 0 0 0 0 0 0 manufacturer category identification feature identification
PCA9673_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 1 february 2007 10 of 33 nxp semiconductors PCA9673 remote 16-bit i/o expander for fm+ i 2 c-bus with interrupt and reset 8. i/o programming 8.1 quasi-bidirectional i/o architecture the PCA9673s 16 ports (see figure 2 ) are entirely independent and can be used either as input or output ports. input data is transferred from the ports to the microcontroller in the read mode (see figure 17 ). output data is transmitted to the ports in the write mode (see figure 16 ). every data transmission from the PCA9673 must consist of an even number of bytes, the ?rst byte will be referred to as p07 to p00, and the second byte as p17 to p10. the third will be referred to as p07 to p00, and so on. this quasi-bidirectional i/o can be used as an input or output without the use of a control signal for data directions. at power-on the i/os are high. in this mode only a current source (i oh ) to v dd is active. an additional strong pull-up to v dd (i trt(pu) ) allows fast rising edges into heavily loaded outputs. these devices turn on when an output is written high, and are switched off by the negative edge of scl. the i/os should be high before being used as inputs. after power-on, as all the i/os are set high, all of them can be used as inputs. any change in setting of the i/os as either inputs or outputs can be done with the write mode. remark: if a high is applied to an i/o which has been written earlier to low, a large current (i ol ) will ?ow to v ss . 8.2 writing to the port (output mode) to write, the master (microcontroller) ?rst addresses the slave device. by setting the last bit of the byte containing the slave address to logic 0 the write mode is entered. the PCA9673 acknowledges and the master sends the ?rst data byte for p07 to p00. after the if more than 2 bytes are read, the slave device loops back to the ?rst byte (manufacturer byte) and keeps sending data until the master generates a no acknowledge. fig 14. device id ?eld reading 002aac334 1 1 1 1 0 0 0 a s 1 device id address start condition r/w acknowledge from one or several slave(s) a5 a4 a3 a2 a1 a0 x a6 a 1 1 1 1 0 0 1 1 device id address a i 2 c-bus slave address of the device to be identified don't care acknowledge from slave to be identified acknowledge from slave to be identified r/w m6 m5 m4 m7 m2 m1 m0 m3 a acknowledge from master c5 c4 c3 c6 c1 c0 f5 c2 a acknowledge from master manufacturer name = 00000000 p3 p2 p1 f4 p0 r2 r1 r0 revision = 000 feature identification = 000100 a p stop condition no acknowledge from master category identification = 0000001
PCA9673_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 1 february 2007 11 of 33 nxp semiconductors PCA9673 remote 16-bit i/o expander for fm+ i 2 c-bus with interrupt and reset ?rst data byte is acknowledged by the PCA9673, the second data byte p17 to p10 is sent by the master. once again, the PCA9673 acknowledges the receipt of the data. each 8-bit data is presented on the port lines after it has been acknowledged by the PCA9673. the number of data bytes that can be sent successively is not limited. after every two bytes, the previous data is overwritten. the ?rst data byte in every pair refers to port 0 (p07 to p00), whereas the second data byte in every pair refers to port 1 (p17 to p10). see figure 15 . 8.3 reading from a port (input mode) all ports programmed as input should be set to logic 1. to read, the master (microcontroller) ?rst addresses the slave device after it receives the interrupt. by setting the last bit of the byte containing the slave address to logic 1 the read mode is entered. the data bytes that follow on the sda are the values on the ports. if the data on the input port changes faster than the master can read, this data may be lost. fig 15. correlation between bits and ports a 002aab634 06 05 04 03 02 01 00 first byte 07 p06 p05 p04 p03 p02 p01 p00 p07 a 16 15 14 13 12 11 10 second byte 17 p16 p15 p14 p13 p12 p11 p10 p17 fig 16. write mode (output) a5 a4 a3 a2 a1 a0 0 a sa6 slave address start condition r/w acknowledge from slave 002aab632 p 06 1 p 07 data to port 0 a acknowledge from slave 12345678 scl 9 sda a acknowledge from slave write to port data output from port t v(q) p05 data to port 1 data a0 and b0 valid p16 output voltage i trt(pu) i oh t d(rst) p16 pull-up output current int p 04 p 03 p 02 p 01 p 00 p 17 p 14 p 13 p 12 p 11 p 10 1 p16 p 15 t v(q) data a0 and b0 valid p05 output voltage i trt(pu) i oh p05 pull-up output current
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx PCA9673_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 1 february 2007 12 of 33 nxp semiconductors PCA9673 remote 16-bit i/o expander for fm+ i 2 c-bus with interrupt and reset transfer of data can be stopped at any moment by a stop condition. when this occurs, data present at the latest acknowledge pha se is valid (output mode). fig 17. read input port register, scenario 1 a5 a4 a3 a2 a1 a0 1 a sa6 start condition r/w acknowledge from slave 002aac312 a acknowledge from master scl sda a read from port 0 data into port 0 int a 1 no acknowledge from master p data 10 data12 t v(d) t d(rst) 9 8 7 6 5 4 3 2 1 p0x data 00 acknowledge from master p1x data 11 p0x data 00 acknowledge from master p1x data 12 data into port 1 data 00 read from port 1 data 11
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx PCA9673_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 1 february 2007 13 of 33 nxp semiconductors PCA9673 remote 16-bit i/o expander for fm+ i 2 c-bus with interrupt and reset transfer of data can be stopped at any moment by a stop condition. when this occurs, data present at the latest acknowledge pha se is valid (output mode). fig 18. read input port register, scenario 2 1 a s start condition r/w acknowledge from slave 002aac313 a acknowledge from master scl sda a read from port 0 data into port 0 int a 1 no acknowledge from master p data 10 data12 t v(d) t d(rst) 9 8 7 6 5 4 3 2 1 p0x data 00 acknowledge from master p1x p0x acknowledge from master p1x data into port 1 data 00 read from port 1 data 11 t h(d) data 01 t h(d) data 02 t su(d) data 03 t su(d) a5 a4 a3 a2 a1 a0 a6 data 10 data 03 data 12
PCA9673_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 1 february 2007 14 of 33 nxp semiconductors PCA9673 remote 16-bit i/o expander for fm+ i 2 c-bus with interrupt and reset 8.4 power-on reset when power is applied to v dd , an internal power-on reset (por) holds the PCA9673 in a reset condition until v dd has reached v por . at that point, the reset condition is released and the PCA9673 registers and i 2 c-bus/smbus state machine will initialize to their default states. thereafter v dd must be lowered below 0.2 v to reset the device. 8.5 interrupt output ( int) the PCA9673 provides an open-drain interrupt ( int) which can be fed to a corresponding input of the microcontroller (see figure 17 , figure 18 , and figure 19 ). this gives these chips a kind of master function which can initiate an action elsewhere in the system. an interrupt is generated by any rising or falling edge of the port inputs. after time t (v)d the signal int is valid. the interrupt disappears when data on the port is changed to the original setting or data is read from or written to the device which has generated the interrupt. in the write mode, the interrupt may become deactivated (high) on the rising edge of the write to port pulse. on the falling edge of the write to port pulse the interrupt is de?nitely deactivated (high). the interrupt is reset in the read mode on the rising edge of the read from port pulse. during the resetting of the interrupt itself, any changes on the i/os may not generate an interrupt. after the interrupt is reset any change in i/os will be detected and transmitted as an int. 8.6 reset input a reset can be accomplished by holding the reset pin low for a minimum of t w(rst) . the PCA9673 registers and i 2 c-bus state machine will be held in their default state until the reset input is once again high. fig 19. application of multiple PCA9673s with interrupt 002aac308 v dd microcomputer int PCA9673 int PCA9673 int device 1 device 2 PCA9673 int device 8
PCA9673_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 1 february 2007 15 of 33 nxp semiconductors PCA9673 remote 16-bit i/o expander for fm+ i 2 c-bus with interrupt and reset 9. characteristics of the i 2 c-bus the i 2 c-bus is for 2-way, 2-line communication between different ics or modules. the two lines are a serial data line (sda) and a serial clock line (scl). both lines must be connected to a positive supply via a pull-up resistor when connected to the output stages of a device. data transfer may be initiated only when the bus is not busy. 9.1 bit transfer one data bit is transferred during each clock pulse. the data on the sda line must remain stable during the high period of the clock pulse as changes in the data line at this time will be interpreted as control signals (see figure 20 ). 9.1.1 start and stop conditions both data and clock lines remain high when the bus is not busy. a high-to-low transition of the data line while the clock is high is de?ned as the start condition (s). a low-to-high transition of the data line while the clock is high is de?ned as the stop condition (p) (see figure 21 .) 9.2 system con?guration a device generating a message is a transmitter; a device receiving is the receiver. the device that controls the message is the master and the devices which are controlled by the master are the slaves (see figure 22 ). fig 20. bit transfer mba607 data line stable; data valid change of data allowed sda scl fig 21. de?nition of start and stop conditions mba608 sda scl p stop condition sda scl s start condition
PCA9673_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 1 february 2007 16 of 33 nxp semiconductors PCA9673 remote 16-bit i/o expander for fm+ i 2 c-bus with interrupt and reset 9.3 acknowledge the number of data bytes transferred between the start and the stop conditions from transmitter to receiver is not limited. each byte of eight bits is followed by one acknowledge bit. the acknowledge bit is a high level put on the bus by the transmitter, whereas the master generates an extra acknowledge related clock pulse. a slave receiver which is addressed must generate an acknowledge after the reception of each byte. also a master must generate an acknowledge after the reception of each byte that has been clocked out of the slave transmitter. the device that acknowledges has to pull down the sda line during the acknowledge clock pulse, so that the sda line is stable low during the high period of the acknowledge related clock pulse; set-up and hold times must be taken into account. a master receiver must signal an end of data to the transmitter by not generating an acknowledge on the last byte that has been clocked out of the slave. in this event, the transmitter must leave the data line high to enable the master to generate a stop condition. fig 22. system con?guration 002aaa966 master transmitter/ receiver slave receiver slave transmitter/ receiver master transmitter master transmitter/ receiver sda scl i 2 c-bus multiplexer slave fig 23. acknowledgement on the i 2 c-bus 002aaa987 s start condition 9 8 2 1 clock pulse for acknowledgement not acknowledge acknowledge data output by transmitter data output by receiver scl from master
PCA9673_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 1 february 2007 17 of 33 nxp semiconductors PCA9673 remote 16-bit i/o expander for fm+ i 2 c-bus with interrupt and reset 10. application design-in information 10.1 bidirectional i/o expander applications in the 8-bit i/o expander application shown in figure 24 , p00 and p01 are inputs, and p02 to p07 are outputs. when used in this con?guration, during a write, the input (p00 and p01) must be written as high so the external devices fully control the input ports. the desired high or low logic levels may be written to the i/os used as outputs (p02 to p07). during a read, the logic levels of the external devices driving the input ports (p00 and p01) and the previous written logic level to the output ports (p02 to p07) will be read. the gpio also has an interrupt line ( int) that can be connected to the interrupt logic of the microprocessor. by sending an interrupt signal on this line, the remote i/o informs the microprocessor that there is incoming data or a change of data on its ports without having to communicate via the i 2 c-bus. 10.2 high current-drive load applications the gpio has a maximum sinking current of 25 ma per bit. in applications requiring additional drive, two port pins in the same octal may be connected together to sink up to 50 ma current. both bits must then always be turned on or off together. up to 8 pins (one octal) can be connected together to drive 200 ma. fig 24. bidirectional i/o expander application 002aac310 v dd temperature sensor battery status control for latch control for switch control for audio control for camera control for mp3 p00 p01 p02 p03 p04 p05 p06 p07 v dd sda scl int ad0 ad1 core processor v dd reset fig 25. high current-drive load application 002aac311 v dd p00 p01 p02 p03 p04 p05 p06 p07 v dd sda scl int core processor v dd load ad0 ad1 reset
PCA9673_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 1 february 2007 18 of 33 nxp semiconductors PCA9673 remote 16-bit i/o expander for fm+ i 2 c-bus with interrupt and reset 10.3 differences between the PCA9673 and the pcf8575 the PCA9673 is a drop in replacement for the pcf8575 and can used without electrical or software modi?cations, but there is a difference in interrupt output release timing during the read operation. write operations are identical. at the completion of each 8-bit write sequence the data is stored in its associated 8-bit write register at ack or nack. the ?rst byte goes to p0n while the second goes to p1n. subsequent writes without a stop wrap around to p0n then p1n again. any write will update both read registers and clear interrupts. read operations are identical. both devices update the byte register with the pin data as each 8-bit read is initiated, the very ?rst read after an address cycle corresponds to ports p0n while the second (even byte) corresponds to p1n and subsequent reads without a stop wrap around to p0n then p1n again. during read operations, the PCA9673 interrupt output will be cleared in a byte-wise fashion as each byte is read. reading the ?rst byte will clear any interrupts associated with the p0n pins. this ?rst byte read operation will have no effect on interrupts associated with changes of state on the p1n pins. interrupts associated with the p1n pins will be cleared when the second byte is read. reading the second byte has no effect on interrupts associated with the changes of state on the p0x pins. the pcf8575 interrupt output will clear after reading both bytes of data regardless of whether data was changed in the ?rst byte or the second byte or both bytes. 11. limiting values [1] total package (maximum) output current is 600 ma. table 4. limiting values in accordance with the absolute maximum rating system (iec 60134). symbol parameter conditions min max unit v dd supply voltage - 0.5 +6 v i dd supply current - 100 ma i ss ground supply current - 600 ma v i input voltage v ss - 0.5 5.5 v i i input current - 20 ma i o output current - 50 [1] ma p tot total power dissipation - 600 mw p/out power dissipation per output - 200 mw t stg storage temperature - 65 +150 c t amb ambient temperature operating - 40 +85 c
PCA9673_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 1 february 2007 19 of 33 nxp semiconductors PCA9673 remote 16-bit i/o expander for fm+ i 2 c-bus with interrupt and reset 12. static characteristics table 5. static characteristics v dd = 2.3 v to 5.5 v; v ss =0v; t amb = - 40 cto+85 c; unless otherwise speci?ed. symbol parameter conditions min typ max unit supplies v dd supply voltage 2.3 - 5.5 v i dd supply current operating mode; no load; v i =v dd or v ss ; f scl = 400 khz - 200 500 m a i stb standby current standby mode; no load; v i =v dd or v ss - 2.5 10 m a v por power-on reset voltage [1] - 1.8 2.0 v input scl; input/output sda v il low-level input voltage - 0.5 - +0.3v dd v v ih high-level input voltage 0.7v dd - 5.5 v i ol low-level output current v ol = 0.4 v; v dd = 2.3 v 20 - - ma v ol = 0.4 v; v dd = 3.0 v 25 - - ma v ol = 0.4 v; v dd = 4.5 v 30 - - ma i l leakage current v i =v dd or v ss - 1- +1 m a c i input capacitance v i =v ss - 4 10 pf i/os; p00 to p07 and p10 to p17 i ol low-level output current [2] v ol = 0.5 v; v dd = 2.3 v 12 27 - ma v ol = 0.5 v; v dd = 3.0 v 17 35 - ma v ol = 0.5 v; v dd = 4.5 v 25 42 - ma i ol(tot) total low-level output current [2] v ol = 0.5 v; v dd = 4.5 v - - 400 ma i oh high-level output current v oh =v ss - 30 - 150 - 300 m a i trt(pu) transient boosted pull-up current v oh =v ss ; see figure 16 - 0.5 - 1.0 - ma c i input capacitance [3] - 4 10 pf c o output capacitance [3] - 4 10 pf interrupt int i ol low-level output current v ol = 0.4 v 6 - - ma c o output capacitance - 3 5 pf input reset v il low-level input voltage - 0.5 - +0.8 v v ih high-level input voltage 2 - 5.5 v i li input leakage current - 1- +1 m a i oh high-level output current - 1- +1 m a c i input capacitance - 3 5 pf inputs ad0, ad1 v il low-level input voltage - 0.5 - +0.3v dd v v ih high-level input voltage 0.7v dd - 5.5 v i li input leakage current - 1- +1 m a c i input capacitance - 3 5 pf
PCA9673_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 1 february 2007 20 of 33 nxp semiconductors PCA9673 remote 16-bit i/o expander for fm+ i 2 c-bus with interrupt and reset [1] the power-on reset circuit resets the i 2 c-bus logic with v dd PCA9673_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 1 february 2007 21 of 33 nxp semiconductors PCA9673 remote 16-bit i/o expander for fm+ i 2 c-bus with interrupt and reset [1] t vd;ack = time for acknowledgement signal from scl low to sda (out) low. [2] t vd;dat = minimum time for sda data out to be valid following scl low. [3] c b = total capacitance of one bus line in pf. [4] a master device must internally provide a hold time of at least 300 ns for the sda signal (refer to the v il of the scl signal) in order to bridge the unde?ned region scls falling edge. [5] the maximum t f for the sda and scl bus lines is speci?ed at 300 ns. the maximum fall time for the sda output stage t f is speci?ed at 250 ns. this allows series protection resistors to be connected between the sda and the scl pins and the sda/scl bus lines witho ut exceeding the maximum speci?ed t f . [6] input ?lters on the sda and scl inputs suppress noise spikes less than 50 ns. rise and fall times refer to v il and v ih . fig 26. i 2 c-bus timing diagram scl sda t hd;sta t su;dat t hd;dat t f t buf t su;sta t low t high t vd;ack 002aab175 t su;sto protocol start condition (s) bit 7 msb (a7) bit 6 (a6) bit 0 (r/w) acknowledge (a) stop condition (p) 1 /f scl t r t vd;dat fig 27. reset timing sda scl 002aac282 t rst 50 % 30 % 50 % 50 % 50 % t rec(rst) t w(rst) reset p0n, p1n output off start t rst ack or read cycle
PCA9673_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 1 february 2007 22 of 33 nxp semiconductors PCA9673 remote 16-bit i/o expander for fm+ i 2 c-bus with interrupt and reset 14. package outline fig 28. package outline sot137-1 (so24) unit a max. a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p q z y w v q references outline version european projection issue date iec jedec jeita mm inches 2.65 0.3 0.1 2.45 2.25 0.49 0.36 0.32 0.23 15.6 15.2 7.6 7.4 1.27 10.65 10.00 1.1 1.0 0.9 0.4 8 0 o o 0.25 0.1 dimensions (inch dimensions are derived from the original mm dimensions) note 1. plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 1.1 0.4 sot137-1 x 12 24 w m q a a 1 a 2 b p d h e l p q detail x e z c l v m a 13 (a ) 3 a y 0.25 075e05 ms-013 pin 1 index 0.1 0.012 0.004 0.096 0.089 0.019 0.014 0.013 0.009 0.61 0.60 0.30 0.29 0.05 1.4 0.055 0.419 0.394 0.043 0.039 0.035 0.016 0.01 0.25 0.01 0.004 0.043 0.016 0.01 e 1 0 5 10 mm scale so24: plastic small outline package; 24 leads; body width 7.5 mm sot137-1 99-12-27 03-02-19
PCA9673_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 1 february 2007 23 of 33 nxp semiconductors PCA9673 remote 16-bit i/o expander for fm+ i 2 c-bus with interrupt and reset fig 29. package outline sot340-1 (ssop24) unit a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm 0.21 0.05 1.80 1.65 0.38 0.25 0.20 0.09 8.4 8.0 5.4 5.2 0.65 1.25 7.9 7.6 0.9 0.7 0.8 0.4 8 0 o o 0.13 0.1 0.2 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.2 mm maximum per side are not included. 1.03 0.63 sot340-1 mo-150 99-12-27 03-02-19 x w m q a a 1 a 2 b p d h e l p q detail x e z e c l v m a (a ) 3 a 112 24 13 0.25 y pin 1 index 0 2.5 5 mm scale ssop24: plastic shrink small outline package; 24 leads; body width 5.3 mm sot340-1 a max. 2
PCA9673_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 1 february 2007 24 of 33 nxp semiconductors PCA9673 remote 16-bit i/o expander for fm+ i 2 c-bus with interrupt and reset fig 30. package outline sot355-1 (tssop24) unit a 1 a 2 a 3 b p cd (1) e (2) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm 0.15 0.05 0.95 0.80 0.30 0.19 0.2 0.1 7.9 7.7 4.5 4.3 0.65 6.6 6.2 0.4 0.3 8 0 o o 0.13 0.1 0.2 1 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic interlead protrusions of 0.25 mm maximum per side are not included. 0.75 0.50 sot355-1 mo-153 99-12-27 03-02-19 0.25 0.5 0.2 w m b p z e 112 24 13 pin 1 index q a a 1 a 2 l p q detail x l (a ) 3 h e e c v m a x a d y 0 2.5 5 mm scale tssop24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm sot355-1 a max. 1.1
PCA9673_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 1 february 2007 25 of 33 nxp semiconductors PCA9673 remote 16-bit i/o expander for fm+ i 2 c-bus with interrupt and reset fig 31. package outline sot556-1 (ssop24) unit a 1 a 2 a 3 h e l p b p cd (1) e (1) z (1) el y w v q references outline version european projection issue date iec jedec jeita mm 0.25 0.10 1.55 1.40 0.25 0.31 0.20 0.25 0.18 8.8 8.6 4.0 3.8 0.635 1 6.2 5.8 0.89 0.41 1.05 0.66 8 0 o o 8 0 o o 0.18 0.25 0.1 dimensions (millimetre dimensions are derived from the original inch dimensions) note 1. plastic or metal protrusions of 0.2 mm (0.008 inch) maximum per side are not included. sot556-1 99-12-27 03-02-18 w m b p d h e e z e c v m a x a y 1 12 24 13 q a a 1 a 2 l p detail x l (a ) 3 mo-137 0 2.5 5 mm scale ssop24: plastic shrink small outline package; 24 leads; body width 3.9 mm; lead pitch 0.635 mm sot556-1 a max. 1.73 inches 0.0098 0.0040 0.061 0.055 0.01 0.012 0.008 0.0098 0.0075 0.344 0.337 0.157 0.150 0.025 0.041 0.244 0.228 0.035 0.016 0.040 0.026 0.007 0.01 0.004 0.068
PCA9673_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 1 february 2007 26 of 33 nxp semiconductors PCA9673 remote 16-bit i/o expander for fm+ i 2 c-bus with interrupt and reset fig 32. package outline sot616-1 (hvqfn24) 0.5 1 0.2 a 1 e h b unit y e references outline version european projection issue date iec jedec jeita mm 4.1 3.9 d h 2.25 1.95 y 1 4.1 3.9 2.25 1.95 e 1 2.5 e 2 2.5 0.30 0.18 c 0.05 0.00 0.05 0.1 dimensions (mm are the original dimensions) sot616-1 mo-220 - - - - - - 0.5 0.3 l 0.1 v 0.05 w 0 2.5 5 mm scale sot616-1 hvqfn24: plastic thermal enhanced very thin quad flat package; no leads; 24 terminals; body 4 x 4 x 0.85 mm a (1) max. a a 1 c detail x y y 1 c e l e h d h e e 1 b 712 24 19 18 13 6 1 x d e c b a e 2 01-08-08 02-10-22 terminal 1 index area terminal 1 index area a c c b v m w m 1/2 e 1/2 e e (1) note 1. plastic or metal protrusions of 0.075 mm maximum per side are not included. d (1)
PCA9673_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 1 february 2007 27 of 33 nxp semiconductors PCA9673 remote 16-bit i/o expander for fm+ i 2 c-bus with interrupt and reset fig 33. package outline sot815-1 (dhvqfn24) references outline version european projection issue date iec jedec jeita note 1. plastic or metal protrusions of 0.075 mm maximum per side are not included. sot815-1 - - - - - - - - - 03-04-29 sot815-1 0 2.5 5 mm scale b y y 1 c c a c c b v m w m e 1 e 2 terminal 1 index area terminal 1 index area x unit a (1) max. a 1 bc e e h l e 1 y w v mm 1 0.05 0.00 0.30 0.18 0.5 4.5 e 2 1.5 0.2 2.25 1.95 d h 4.25 3.95 0.05 0.05 y 1 0.1 0.1 dimensions (mm are the original dimensions) 0.5 0.3 d (1) 5.6 5.4 e (1) 3.6 3.4 d e b a e dhvqfn24: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 24 terminals; body 3.5 x 5.5 x 0.85 mm a a 1 c detail x e h l d h 2 23 11 14 13 12 1 24
PCA9673_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 1 february 2007 28 of 33 nxp semiconductors PCA9673 remote 16-bit i/o expander for fm+ i 2 c-bus with interrupt and reset 15. handling information inputs and outputs are protected against electrostatic discharge in normal handling. however, to be completely safe you must take normal precautions appropriate to handling integrated circuits. 16. soldering this text provides a very brief insight into a complex technology. a more in-depth account of soldering ics can be found in application note an10365 surface mount re?ow soldering description . 16.1 introduction to soldering soldering is one of the most common methods through which packages are attached to printed circuit boards (pcbs), to form electrical circuits. the soldered joint provides both the mechanical and the electrical connection. there is no single soldering method that is ideal for all ic packages. wave soldering is often preferred when through-hole and surface mount devices (smds) are mixed on one printed wiring board; however, it is not suitable for ?ne pitch smds. re?ow soldering is ideal for the small pitches and high densities that come with increased miniaturization. 16.2 wave and re?ow soldering wave soldering is a joining technology in which the joints are made by solder coming from a standing wave of liquid solder. the wave soldering process is suitable for the following: ? through-hole components ? leaded or leadless smds, which are glued to the surface of the printed circuit board not all smds can be wave soldered. packages with solder balls, and some leadless packages which have solder lands underneath the body, cannot be wave soldered. also, leaded smds with leads having a pitch smaller than ~0.6 mm cannot be wave soldered, due to an increased probability of bridging. the re?ow soldering process involves applying solder paste to a board, followed by component placement and exposure to a temperature pro?le. leaded packages, packages with solder balls, and leadless packages are all re?ow solderable. key characteristics in both wave and re?ow soldering are: ? board speci?cations, including the board ?nish, solder masks and vias ? package footprints, including solder thieves and orientation ? the moisture sensitivity level of the packages ? package placement ? inspection and repair ? lead-free soldering versus pbsn soldering 16.3 wave soldering key characteristics in wave soldering are:
PCA9673_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 1 february 2007 29 of 33 nxp semiconductors PCA9673 remote 16-bit i/o expander for fm+ i 2 c-bus with interrupt and reset ? process issues, such as application of adhesive and ?ux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave ? solder bath speci?cations, including temperature and impurities 16.4 re?ow soldering key characteristics in re?ow soldering are: ? lead-free versus snpb soldering; note that a lead-free re?ow process usually leads to higher minimum peak temperatures (see figure 34 ) than a pbsn process, thus reducing the process window ? solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board ? re?ow temperature pro?le; this pro?le includes preheat, re?ow (in which the board is heated to the peak temperature) and cooling down. it is imperative that the peak temperature is high enough for the solder to make reliable solder joints (a solder paste characteristic). in addition, the peak temperature must be low enough that the packages and/or boards are not damaged. the peak temperature of the package depends on package thickness and volume and is classi?ed in accordance with t ab le 7 and 8 moisture sensitivity precautions, as indicated on the packing, must be respected at all times. studies have shown that small packages reach higher temperatures during re?ow soldering, see figure 34 . table 7. snpb eutectic process (from j-std-020c) package thickness (mm) package re?ow temperature ( c) volume (mm 3 ) < 350 3 350 < 2.5 235 220 3 2.5 220 220 table 8. lead-free process (from j-std-020c) package thickness (mm) package re?ow temperature ( c) volume (mm 3 ) < 350 350 to 2000 > 2000 < 1.6 260 260 260 1.6 to 2.5 260 250 245 > 2.5 250 245 245
PCA9673_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 1 february 2007 30 of 33 nxp semiconductors PCA9673 remote 16-bit i/o expander for fm+ i 2 c-bus with interrupt and reset for further information on temperature pro?les, refer to application note an10365 surface mount re?ow soldering description . 17. abbreviations msl: moisture sensitivity level fig 34. temperature pro?les for large and small components 001aac844 temperature time minimum peak temperature = minimum soldering temperature maximum peak temperature = msl limit, damage level peak temperature table 9. abbreviations acronym description cdm charged device model cmos complementary metal oxide semiconductor esd electrostatic discharge gpio general purpose input/output hbm human body model i 2 c-bus inter-integrated circuit bus id identi?cation led light emitting diode lsb least signi?cant bit mm machine model msb most signi?cant bit plc programmable logic controller raid redundant array of independent disks smbus system management bus
PCA9673_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 1 february 2007 31 of 33 nxp semiconductors PCA9673 remote 16-bit i/o expander for fm+ i 2 c-bus with interrupt and reset 18. revision history table 10. revision history document id release date data sheet status change notice supersedes PCA9673_1 20070201 product data sheet - -
PCA9673_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 1 february 2007 32 of 33 nxp semiconductors PCA9673 remote 16-bit i/o expander for fm+ i 2 c-bus with interrupt and reset 19. legal information 19.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term short data sheet is explained in section de?nitions. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple dev ices. the latest product status information is available on the internet at url http://www .nxp .com . 19.2 de?nitions draft the document is a draft version only. the content is still under internal review and subject to formal approval, which may result in modi?cations or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. short data sheet a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request via the local nxp semiconductors sales of?ce. in case of any inconsistency or con?ict with the short data sheet, the full data sheet shall prevail. 19.3 disclaimers general information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. right to make changes nxp semiconductors reserves the right to make changes to information published in this document, including without limitation speci?cations and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use nxp semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of a nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customers own risk. applications applications that are described herein for any of these products are for illustrative purposes only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the speci?ed use without further testing or modi?cation. limiting values stress above one or more limiting values (as de?ned in the absolute maximum ratings system of iec 60134) may cause permanent damage to the device. limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the characteristics sections of this document is not implied. exposure to limiting values for extended periods may affect device reliability. terms and conditions of sale nxp semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www .nxp .com/pro? le/ter ms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by nxp semiconductors. in case of any inconsistency or con?ict between information in this document and such terms and conditions, the latter will prevail. no offer to sell or license nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 19.4 trademarks notice: all referenced brands, product names, service names and trademarks are the property of their respective owners. i 2 c-bus logo is a trademark of nxp b.v. 20. contact information for additional information, please visit: http://www .nxp.com for sales of?ce addresses, send an email to: salesad dresses@nxp.com document status [1] [2] product status [3] de?nition objective [short] data sheet development this document contains data from the objective speci?cation for product development. preliminary [short] data sheet quali?cation this document contains data from the preliminary speci?cation. product [short] data sheet production this document contains the product speci?cation.
nxp semiconductors PCA9673 remote 16-bit i/o expander for fm+ i 2 c-bus with interrupt and reset ? nxp b.v. 2007. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com date of release: 1 february 2007 document identifier: PCA9673_1 please be aware that important notices concerning this document and the product(s) described herein, have been included in section legal information. 21. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 pinning information . . . . . . . . . . . . . . . . . . . . . . 4 6.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 7 functional description . . . . . . . . . . . . . . . . . . . 6 7.1 device address . . . . . . . . . . . . . . . . . . . . . . . . . 6 7.1.1 address maps. . . . . . . . . . . . . . . . . . . . . . . . . . 7 7.2 software reset call, and device id addresses. 7 7.2.1 software reset . . . . . . . . . . . . . . . . . . . . . . . . . 8 7.2.2 device id (PCA9673 id ?eld) . . . . . . . . . . . . . . 8 8 i/o programming . . . . . . . . . . . . . . . . . . . . . . . 10 8.1 quasi-bidirectional i/o architecture . . . . . . . . 10 8.2 writing to the port (output mode) . . . . . . . . . . 10 8.3 reading from a port (input mode) . . . . . . . . . 11 8.4 power-on reset . . . . . . . . . . . . . . . . . . . . . . . . 14 8.5 interrupt output ( int) . . . . . . . . . . . . . . . . . . . 14 8.6 reset input . . . . . . . . . . . . . . . . . . . . . . . . . . 14 9 characteristics of the i 2 c-bus. . . . . . . . . . . . . 15 9.1 bit transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 9.1.1 start and stop conditions . . . . . . . . . . . . . 15 9.2 system con?guration . . . . . . . . . . . . . . . . . . . 15 9.3 acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . 16 10 application design-in information . . . . . . . . . 17 10.1 bidirectional i/o expander applications . . . . . 17 10.2 high current-drive load applications . . . . . . . . 17 10.3 differences between the PCA9673 and the pcf8575. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 11 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 18 12 static characteristics. . . . . . . . . . . . . . . . . . . . 19 13 dynamic characteristics . . . . . . . . . . . . . . . . . 20 14 package outline . . . . . . . . . . . . . . . . . . . . . . . . 22 15 handling information. . . . . . . . . . . . . . . . . . . . 28 16 soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 16.1 introduction to soldering . . . . . . . . . . . . . . . . . 28 16.2 wave and re?ow soldering . . . . . . . . . . . . . . . 28 16.3 wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 28 16.4 re?ow soldering . . . . . . . . . . . . . . . . . . . . . . . 29 17 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 30 18 revision history . . . . . . . . . . . . . . . . . . . . . . . . 31 19 legal information. . . . . . . . . . . . . . . . . . . . . . . 32 19.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 32 19.2 de?nitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 19.3 disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 32 19.4 trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 32 20 contact information . . . . . . . . . . . . . . . . . . . . 32 21 contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

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